AUTOR DO BLOG ENG.ARMANDO CAVERO MIRANDA SÃO PAULO BRASIL

"OBRIGADO DEUS PELA VIDA,PELA MINHA FAMILIA,PELO TRABALHO,PELO PÃO DE CADA DIA,PROTEGENOS DO MAL"

"OBRIGADO DEUS PELA VIDA,PELA MINHA FAMILIA,PELO TRABALHO,PELO PÃO DE CADA DIA,PROTEGENOS  DO MAL"

“SE SEUS PROJETOS FOREM PARA UM ANO,SEMEIE O GRÂO.SE FOREM PARA DEZ ANOS,PLANTE UMA ÁRVORE.SE FOREM PARA CEM ANOS,EDUQUE O POVO.”

“Sixty years ago I knew everything; now I know nothing; education is a progressive discovery of our own ignorance. Will Durant”

sexta-feira, 30 de abril de 2010

INTERCELL TRANSFORMERS AND POWER INTEGRATION

Éric Labouré(1), François Forest(2), Thierry Meynard(3)
(1)SATIE, ENS cachan, IUFM Univ Paris XII CNRS, UniverSud, 61 av du President Wilson, F-94230 Cachan, France
(2)IES, CNRS UMR 5214, place E. Bataillon, 34095 Montpellier Cedex 5, France
(3)LAPLACE, CNRS UMR 5828, 2 rue Camichel 31071, Toulouse Cedex, France















quinta-feira, 29 de abril de 2010

Design of Transformer and Power stage of Push-Pull Inverter








Design of Transformer and Power stage of
Push-Pull Inverter

Milomir Šoja, Slobodan Lubura, Dejan Jokic, Milan D. Radmanovic, Goran S. Dordevic,
and Branko L. Dokic
Abstract—In this paper is presented the example of
construction of push-pull inverter that can be used in two
different topologies, with two input voltages and three
power ratings which can at the same time achieve AVR
function and “power-save” feature. Special attention was
paid to scheme, turn ratio calculation and transformer coil
windings arrangements that with only two types (of
different power ratings) allows realization of large number
of push-pull inverter configurations that can be applied to

Design and Realisation of Over-voltage Protection in Push-pull Inverters


Design and Realisation of Over-voltage
Protection in Push-pull Inverters
Milomir Šoja, Slobodan Lubura, Dejan Jokic, Milan D. Radmanovic



Abstract—In this paper are presented our research results
about possibility of use different types over-voltage protection
circuits in push-pull inverters. We first analyzed the conventional
passive type RC and RCD over-voltage protection circuits and
gave experimental results. After that we analyzed active overvoltage
protection circuit, made design of protection circuit
components and provided experimental results. Final
investigation has shown that active over-voltage protection is
better solution than passive protection circuits with respect to
efficiency and reliability.






ELECTRONICS JOURNAL


Engineering Review SCIENTIFIC JOURNAL CROATIA


Engineering Review SCIENTIFIC JOURNAL CROATIA
ISSN:
1330-9587
UDK:
62(05)=163.42=111
Contact:
Sveučilište u RijeciTehnički fakultetENGINEERING REVIEWVukovarska 58, 51000 Rijeka, Hrvatskatel: +385 51 651 444fax: +385 51 675 818
Email:
engineering.review@riteh.hr
Url:
http://www.riteh.hr/izda_djel/er/index.html
Publisher:
Faculty of Engineering, University of Rijeka
Vukovarska 58, 51000 Rijeka, Hrvatska/Croatia
http://www.riteh.hr/izda_djel/er/index.html
engineering.review@riteh.hr
Impressum 199.31 KB

JOURNAL OF ELECTRICAL ENGINEERING SLOVAC


ADVANCES AND ELECTRICAL AND ELECTRONIC ENGINEERING



ADVANCES AND ELECTRICAL AND ELECTRONIC ENGINEERING
Online Journal / Online časopis

segunda-feira, 26 de abril de 2010

Philippe ROUX


Ce site s'adresse à l’étudiant en Electronique Analogique.
Il est issu d’un cours donné, jusqu'en 2004, en première année, à l’Institut Universitaire de Technologie de Bordeaux,
Département de Génie Electrique

Laboratory of Electrical Engineering and Power Electronics


A strategic regroupment
The L2EP was born thanks to the will of 4
establishments working in partnership : The
University of Science and Technology of
Lille, Arts et Métiers ParisTech, l''Ecole
Centrale de Lille, Hautes Etudes
d''Ingénieur. The idea was to bring
together, in the same laboratory, all the
activities of research in electronic
engineering.The L2EP was established in
Lille and has an international influence. The
L2EP is a major actor in its areas of research

ELECTRIC ENERGY SYSTEM EDUCATION AND RESEARCH-UNIVERSITY OF MINNESOTA


ELECTRIC ENERGY SYSTEM EDUCATION AND RESEARCH
Internet-based Monthly Seminars

The live and past seminar videos are provided and archived by UNITE. For proper, uninterrupted viewing, please review UNITE's Streaming Video

sábado, 24 de abril de 2010

The Analysis of Mixed Series and Parallel Snubbers to reduce Conducted EMI Emission on a Switching Converter





The Analysis of Mixed Series and Parallel Snubbers to reduce Conducted EMI Emission on a Switching Converter
C. U-Yaisom*, V.Tarateeraseth**, W. Khan-ngern***, S. Nitta**** *Faculty of Engineering Eastern Asia University Patumtanee, 12110, Thailand E-mail:yaisom@hotmail.com **Faculty of Engineering, Srinakharinwirot University, Ongkharak, Thailand E-mail: vuttipon@swu.ac.th ***Faculty of Engineering and Research Center for Communication and Information Technology King Mongkut Institute of Technology Ladkrabang, Bangkok, 10520, Thailand E-mail: kkveerac@kmitl.ac.th ****Graduate School, Production System Engineering Salesian Polytechnic, 2-35-11 Igusa Suginami, Tokyo, 167-0021, Japan E-mail: nitta@cc.tuat.ac.jp

The Comparison of Conducted Electromagnetic Interference Effect on High Frequency Transformer Winding Techniques





The Comparison of Conducted Electromagnetic Interference Effect on High Frequency Transformer Winding Techniques Tanathep Maneenopphon1, Vuttipon Tarateeraseth2, Werachet Khan-ngern1

Tanathep Maneenopphon1, Vuttipon Tarateeraseth2, Werachet Khan-ngern1 1Faculty of Engineering and EMC Laboratory, Research Center for Communications and Information Technology (ReCCIT) King Mongkut’s Institute of Technology Ladkrabang (KMITL), Bangkok, 10520, Thailand 2Faculty of Engineering, Srinakharinwirot University, Ongkharak, Thailand Phone/Fax: +662 737-3000 Ext. 3322, E-mail: tmn_ta@hotmail.com, vuttipon@swu.ac.th, kkveerac@kmitl.ac.th

REGULATION OF OUTPUT VOLTAGE IN BOOST POWER FACTOR CORRECTION CONVERTER WITH ELECTRO MAGNETIC







REGULATION OF OUTPUT VOLTAGE IN BOOST POWER FACTOR
CORRECTION CONVERTER WITH ELECTRO MAGNETIC
INTERFERENCE FILTER
P. RAM MOHAN
Assistant Professor, G. Pulla Reddy Engg. College, Kurnool, Andhra Pradesh, India
rammohan_cdp@yahoo.co.in
M. VIJAYA KUMAR
Professor, JNTU College of Engineering, Anantapur, Andhra Pradesh, India
O.V. RAGHAVA REDDY
Scientist, ISRO Satellite Center, Bangalore, Karnataka, India

quinta-feira, 22 de abril de 2010

Evaluation of Efficiency of Active Clamp Dual Flyback Inverter for Photovoltaic Systems using Simulation Method




Evaluation of Efficiency of Active Clamp Dual Flyback Inverter for Photovoltaic Systems using Simulation Method
R. Šul, B. Dobrucký
University of Zilina, Univerzitna 1, 010 21 Zilina, Slovak Republic, e-mails: sul@fel.uniza.sk, dobrucky@fel.uniza.sk
P. Čerňan
Clayton Power R&D, s.r.o, Legionarska 7158/5, SK911 01 Trencin, Slovak Republic, e-mail:
pc@claytonpower.com
Introduction
Dual flyback inverter (DFBI) is one of the preferred topologies for isolated low cost low power photovoltaic (PV) applications. It converts PV cells DC voltage to output AC voltage using single power stage. It is important to understand loss distribution of DFBI be able to reach efficiency limits of this topology. This paper evaluates the efficiency of DFBI based on computer simulation results worked-out by Simetrix circuit simulator.

Performance Investigation of Dynamic Characteristics of Power Semiconductor Diodes






Performance Investigation of Dynamic Characteristics of Power Semiconductor Diodes
P. Špánik, R. Šul, M. Frívaldský, P. Drgoňa, J. Kandráč
University of Zilina, Univerzitna 1, 010 26, Zilina, Slovakia,
e-mail: sul@fel.uniza.sk, frivaldsky@fel.uniza.sk, spanik@fel.uniza.sk, drgona@fel.uniza.sk
ELECTRONICS AND ELECTRICAL ENGINEERING
ISSN 1392 – 1215 2010. No. 3(99)
ELEKTRONIKA IR ELEKTROTECHNIKA

quarta-feira, 21 de abril de 2010

LOSSES PREDICTION IN SILICON STEEL SHEETS FOR MAGNETIC INDUCTION






LOSSES PREDICTION IN SILICON STEEL SHEETS FOR MAGNETIC
INDUCTION WAVEFORMS WITHOUT LOCAL MINIMA
J. P. F. Lima, A. J. Batista, P. C. M. Machado, E. G. Marra
Escola de Engenharia Elétrica e de Computação, Universidade Federal de Goiás
Praça Universitária s/n, Setor Universitário, 74605-220, Goiânia – GO, Brasil