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AUTOR DO BLOG ENG. ARMANDO CAVERO MIRANDA SAO PAULO BRASIL

sexta-feira, 14 de abril de 2017

Design, Development and Control of >13 kV Silicon-Carbide MOSFET based Solid State Transformer (SST) by Gangyao Wang- North Carolina State University









Design, Development and Control of >13 kV Silicon-Carbide MOSFET based Solid State Transformer (SST) by Gangyao Wang 
A dissertation submitted to the Graduate Faculty of North Carolina State University in partial fulfillment of the requirements for the Degree of Doctor of Philosophy 
Electrical Engineering Raleigh, North Carolina

WANG, GANGYAO. Design, Development and Control of >13 kV Silicon-Carbide MOSFET based Solid State Transformer (SST).

 ABSTRACT
Within the advent of the smart grid system, the solid state transformer (SST) will replace the traditional 60 Hz transformer formed by silicon steel core and copper windings and provides the interface between the high distribution voltage and low utility voltage. Other than the smaller size and less weight, SST also brings many more functionalities including voltage regulation, reactive power compensation, power management and renewable energy integration. The motivation of this research is to design a solid state transformer based on the wide band-gap Silicon Carbide (SiC) power MOSFETs and compare it with the silicon IGBT based SST. With wider band-gap and higher critical electrical field, the high voltage SiC power device has advantages over silicon power device for both conduction and switching. An extensive study and characterization of the SiC MOSFET was first carried out. It has been found that the MOSFET parasitic capacitors store significant amount of energy and the MOSFET turn on loss is high but turn off loss is virtually zero with small enough turn on gate resistor. A method for estimating the MOSFET parasitic capacitances has been proposed and explained in detail. A PLECS loss simulation model has been developed for the >13 kV SiC MOSFET which has been verified through a boost converter with the SiC MOSFET switches under 40 kHz for both soft switching and hard switching conditions separately. Widely used full bridge circuit has been chosen as the topology for the SST rectifier for its simple structure and bidirectional power transfer capability. Form three different SPWM modulation methods, the bipolar single frequency SPWM method has been identified as the most suitable control algorithm for the >13 kV SiC MOSFET base rectifier. With such modulation method, the generated PWM voltage frequency equals to the switching frequency, the each MOSFET equivalent switching frequency under hard switching conditions is only 1/4 of the PWM voltage frequency. The SST rectifier efficiency has been simulated and measured for 6 kHz and 12 kHz switching frequency with 6 kV dc bus voltage and 3.6 kV ac voltage, which is 99.2% for 6 kHz with 8.8 kW load and 98.5% for 12 kHz with 8.3 kW load.

The SST DC-DC stage utilize the dual active half bridge (DHB) as the topology, its zero voltage switching (ZVS) turn on range has been analyzed and it is concluded that the dead-time and device parasitic capacitances will reduce the ZVS range while the magnetizing current will increase the ZVS range. Since the SiC MOSFET has very high turn on loss, it is desired to have ZVS for the full load range. The high frequency transformer with integrated leakage inductance for the DHB operation has been designed, the magnetizing inductance has been decreased for increasing the ZVS range. The DC-DC stage efficiency has been measured as 96.9% for 10 kHz switching frequency and 10 kW load, and the peak efficiency is 97.5% for 10 kHz switching frequency and 5 kW load.

LINK VIEW FULL TEXT
https://repository.lib.ncsu.edu/handle/1840.16/9163

URL DIRECT :
https://repository.lib.ncsu.edu/bitstream/handle/1840.16/9163/etd.pdf?sequence=2&isAllowed=y

ALTERNATIVE LINK
http://www.mediafire.com/file/1eno463fcg4kj26/Design%2C_Development_and_Control_of_13_kV_SiliconC.pdf

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