In today’s PV, UPS and GPI systems, three-phase output inverters are often based on three-level topologies using Silicon IGBTs. This article demonstrates the potential of a hybrid inverter using CoolSiCTM MOSFETs and TRENCHSTOPTM 5 Silicon IGBTs.
State of the Art Three-Level Inverter Topologies Three-level inverters based on Silicon IGBTs are a common design solution giving an excellent cost/performance ratio. As explained in [1]-[3], the technical advantage over the classical two-level B6 inverter represented in Figure 1 (a) is a reduction of switching losses and filtering effort, at the expenses of higher circuit complexity. Two commonly found three-level designs in the low to mid power range are the Neutral Point Clamping Diode and the Neutral Point Clamping Transistor topology, illustrated in figure 1 (b) and (c), respectively.
Figure 1: Commonly used inverter configurations: (a) two-level (B6, Six-Pack) inverter; (b) three-level neutral point clamping diodes (NPC-1, I-Type) inverter; (c) three-level transistor clamped (NPC-2, T-Type) inverter; for each topology only one out of three phases is shown.
SiC Technology Changes the Picture
The unique features of Silicon Carbide (SiC) switches were described in [7] and [8] together with the potential impact on applications. With the emerging SiC semiconductor technology the degrees of freedom for the designer become higher, opening the path to new scenarios: fast 1200V SiC switches can make T-Type inverters attractive for higher frequencies and even the transition back to a two-level solution might be considered in order to achieve higher efficiency and reduce the bill of material [6]. In the following sections, the potential of a hybrid T-Type inverter using 1200V CoolSiC™ MOSFETs and 650V TRENCHSTOPTM 5 IGBTs is demonstrated experimentally. The key benefits of this approach are low conduction and switching losses, relatively low effort for output and EMI filtering and – compared to converters with more than three levels – moderate control effort. Test Setup and Conditions Since this article considers the influence of only the power semiconductors on the system efficiency, all measurements were carried out using a single phase test board and a fixed L-C-L output filter designed by Tecnologie Future S.r.l. and Infineon Technologies Austria A.G. The design goals for this platform were a simple component replacement as well as an easy access for thermal and electrical measurements – not a demonstration of power density or a BOM cost reduction. It should be noted that the absolute efficiency values obtained with a single-phase system do not correspond one-to-one to the values of a three-phase and three-wire system, i.e. a system without exposed neutral. First, the core losses of the filters are different and second the modulation scheme cannot use a third-harmonic injection technique. All devices were operated using an Infineon 1EDI60N12AF driver. This compact, isolated, single channel driver is based on the coreless transformer technology, featuring a high common mode transient immunity – a major requirement when dealing with high speed switches. The output voltage of the drivers is provided using a local HF transformer close to the driver that is fed from one resonant AC link. Using the turn-ratio of the transformer, the gate voltages are set to +15V for turn-on and -5V for turn-off. The single phase inverter was operated at a constant DC link voltage of 720VDC providing a voltage of 230VRMS on the output. Using an electric AC load the output current of the inverter was increased in steps of 1,5ARMS every 5 minutes in order to determine the conversion efficiency for different load situations.
LINK ORIGINAL
https://eepower.com/power-converters/practical-study-three-level-hybrid-sicsi-inverters-infineon-877#disqus_thread
