A Design and Fabrication of PWM Power Amplifier for Digital Audio signal Jun-Sung, Lee Dept. of Electronical and Computer Engineering The Graduate School SungKyunKwan University

A Design and Fabrication of PWM Power
Amplifier for Digital Audio signal

Jun-Sung, Lee
Dept. of Electronical and Computer Engineering
The Graduate School
SungKyunKwan University

Amplifiers in electronics are used in a wide variety of applications in audio, video and telecommunications. Conventional amplifiers such as Class-A, Class-B, Class-AB based on linear circuit technology have good distortion characteristics, but yield poor efficiency and need large size of cooling material. On the other hand, the Class-D amplifier has good efficiency and small size, but relatively bad Total Harmonic Distortion(THD) and Signal to Noise Ratio(SNR) because of a switching mode operation. Recent researches have demonstrated the feasibility of realizing an almost complete digital audio system. The characteristics of THD and SNR of the Class-D amplifier depend on the duty ratio, rising falling and settling time of output PWM(Pulse Width Modulation) signals. This paper presents a one-chip monolithic integrated circuit(IC) of the two-channel Class-D audio power amplifier with high efficiency and lower THD using a 0.65[㎛], 40[V] bCDMOS process. Each channel can drive 50[W] power and a single channel power of 100[W] can be obtained through the external control signal. The Class-D amplifier at the output stage is controlled by generating a PWM signal. The conversion of the digital audio data to PWM pulse stream is performed by using PCM to PWM converter and results in the elimination of the THD. The results of the study are as follows: 1. The design and implementation of a 2-channel Class-D amplifier using 40[V] bCDMOS technology and the evaluation on the performance of designed class-D amplifier through fabricated wafer. ① The size of die is 3,700[㎛]×5,100[㎛]. The output power transistor occupies 60[%] of the die area. The output current driving capability and on-resistance are mainly considered features. ② The THD is 0.07[%] at 1[W] output power. ③ The Efficiency is 92[%] at 20[W] output power. The efficiency is getting worse when the output power is below 5[W] and above 35[W]. At a lower power consumption mode, the internal power takes up a larger portion of the total power. On the other hand, at a high power mode, power consumed by the resistance of bonding wire, routing metal and on-resistance of the MOS transistor are more dominant. These results are obtained by measuring selected samples out of packaged products. But, Some parts of the circuit need improvement before the mass production.
LINK
http://www.mediafire.com/view/ci41jtvncuyxdd0/PWM_POWER_AMPLIFIER.pdf