ANALYSIS AND CONTROL OF GRID-CONNECTED THREE-LEVEL T-TYPE CONVERTERS-Author Payam Alemi Graduate School of Yeungnam University Department of Electrical Engineering

ANALYSIS AND CONTROL OF GRID-CONNECTED THREE-LEVEL T-TYPE CONVERTERS
Ph.D. Thesis Author Payam Alemi 
Graduate School of Yeungnam University Department of Electrical Engineering Control and Electric Machinery ∙ Power Conversion Major 
 Abstract
 In this research the brief overview of multilevel converter topologies is presented and the efficiency of multilevel converters is checked by a comparative analysis of power losses for the three-level T-type and neutral-point clamped (NPC) PWM inverters in which the conduction and switching losses of semiconductor devices of the inverters are taken into account. Power losses for the T-type and NPC inverters are analyzed and calculated at the different operating points of MI, PF and the switching frequency, in which the four different models of semiconductor devices are adopted. Then a generalized power loss algorithm for multilevel NPC PWM inverters is proposed to find the power losses in higher levels of NPC inverters, which is applicable to any level number of multilevel inverters. In the case of higher level of inverters than the threelevel, the loss of semiconductor devices cannot be analyzed by conventional methods. The modulation depth should be considered in addition, to find the different conducting devices depending on the MI. In the case of AC/DC/AC PWM converter topology which is widely used in the field of AC motor drives, the DC-link capacitor is the most critical component in determining the life time of the converter which is large, heavy and unreliable. A novel control algorithm that minimizes the DC-link capacitance in the T-type three-level back-to-back converter is proposed. For this, the charging and discharging currents through the capacitor should be minimized, which can be achieved by utilizing the power balance of the AC/DC converter. Then, the voltage variation in the DC-link is also decreased, which makes a significant reduction in the size of DC-link capacitors. With this scheme, the electrolytic capacitors can be replaced by film capacitors which are of higher power density, longer life time and higher reliability. Beside the advantages of PWM converters, there is an issue to mitigate the PWM harmonic ripples in the grid current. To reduce the current harmonics around the switching frequency (2-15 kHz), a relatively large value of input inductance is needed. Due to the disadvantages in terms of inductor size, which can deteriorate the system d ynamics and also the cost of inductors which can be a point in the case of high range, the LLCL filters topology is presented. The LLCL filters structure consists of connecting a small inductor in series with the capacitor in the conventional LCL filters, which can attenuate the switching-frequency-related current ripples more effectively than the LCL filters, resulting in a significant reduction in the grid-side i nductor size. However, the resonance phenomenon is still an issue to solve in this filter. Th e active damping control scheme of LLCL filters based on the PR (proportional-resonant) regulator and virtual resistor methods are proposed to suppress the filter resonance for the grid-connected three-level T-type PWM converter systems. The validity of the power loss analysis has been verified by the Matlab simulation for the three-and five-level NPC inverters and experiment for three-level NPC inverter. The modulation depth needs to be considered for higher level than three-level inverters. In the five-level inverter, the jumps of the conduction and switching power losses occur at MI=0.5 where the modulation depth changes. The PSIM simulation and experimental results have been shown to verify the effectiveness of the proposed strategy for DC-link capacitor minimization where a 3-kW converter system with a 50μF film capacitor operated in a wide range of speed and load and the DC-link voltage is effectively regulated within allowable ranges. The resonance suppression of LLCL filters in T-type three-level PWM converter has been investigated by PR and virtual resistor active damping methods. In the LLCL filters, the grid-side inductor has been reduced by 60% compared with the LCL filters from 0.8 mH to 0.35 mH in the simulation and from 1 mH to 0.4 mH in the experiment with which the THD and dominant harmonic component of the grid current have met the IEEE standard.
LINK
http://www.mediafire.com/file/3xs2s32qs85fc3f/ANALYSIS_AND_CONTROL_OF_GRID_CONNECTED_THREE_LEVEL_T-TYPE_CONVERTERS.pdf/file