Two-stage Active Gate Driver for SiC MOSFET by Abhay Negi Faculty of North Carolina State University Thesis Master of Science Electrical Engineering

Two-stage Active Gate Driver for SiC MOSFET by Abhay Negi 

A thesis submitted to the Graduate Faculty of North Carolina State University in partial fulfillment of the requirements for the degree of Master of Science Electrical Engineering
Raleigh, North Carolina 2017

ABSTRACT
NEGI, ABHAY. Two-stage Active Gate driver for SiC MOSFET. (Under the direction of Dr. Subhashish Bhattacharya).

Wide-band gap devices have rejuvenated the research in field of power electronics due to their superior properties over Silicon (Si) such as low on-resistance, high breakdown voltage, low switching losses and high temperature operation. However, SiC MOSFETs and GaN devices pose varied challenges due to high dv/dt and di/dt switching which creates issues related EMI, common mode current, high voltage overshoot, cross-talk, etc. In phase-leg configuration, due to high turn-on dv/dt of SiC MOSFET, a positive spurious voltage is induced on the gate to source voltage (Vgs) of the complementary MOSFET. This reduces signal to noise margin on the Vgs of the complementary MOSFET making it susceptible to spurious turn-on in the phase-leg. This can be reduced by using higher turn-on gate resistance for lower dv/dt but it will lead to higher switching loss. This thesis explores the twostage turn-on active gating for SiC MOSFETs to control turn-on dv/dt and di/dt independently. A two-stage active gate driver is designed which uses lower gate resistance in first stage to increase rate of current rise and higher gate resistance in second stage for lower turn-on dv/dt. A low-inductance DC bus PCB is designed to minimize voltage overshoots and ringing associated with high loop inductance. Switching losses are measured with and without active gating by double-pulse testing of 1200V/ 300A ROHM SiC half-bridge module BSM300D12P2E001 for comparison.

LINK:https://research.ece.ncsu.edu/bhattacharya/wp-content/uploads/2019/07/etd29.pdf

ENGENHEIRA TELECOMUNICAÇÕES GERALDIDE FRANCIA GANHADORA DO PROJETO PAPEATEC CONCURSO GENTE BRILHANTE TELEFONICA PERU

GERALDINE FRANCIA La tecnología es una herramienta que cambia vidas y Geraldine es prueba de ello. Esta ingeniera de telecomunicaciones promueve el aumento de la presencia femenina en este rubro porque sabe que traería grandes beneficios.

PROYECTO “Papeatec” – Yauyos, Lima El proyecto consiste en acercar la tecnología a estudiantes de una comunidad agrícola de Yauyos mediante talleres formativos en programación y electrónica aplicada a Internet. Los conocimientos adquiridos les servirán para desarrollar una red de sensores que miden las características de los suelos agrícolas y elegir el más adecuado para cada tipo de sembrío. Los conocimientos a brindar favorecerán a que los estudiantes descubran cómo la tecnología puede mejorar sus vidas, a través de diversos ejemplos de tecnología aplicada a agricultura, ganadería y acuicultura.

FUENTE ORIGINAL:
https://elcomercio.pe/especial/comprometidosconlaeducacion/temporada-2/geraldine-francia-noticia-1994800?utm_source=ElComercio&utm_medium=Portada-Principal&utm_campaign=fundacion-telefonica

A Non-isolated ZVZCS Resonant PWM DC-DC Converter for High Step-up and High Power Applications Author Jung,Byoung Kil Dept.of Control and Instrumentation Eng. Graduate School of Industry and Engineering Seoul National University of Science and Technology

Abstract
 A Non-isolated ZVZCS Resonant PWM DC-DC Converter for High Step-up and High Power Applications Jung,ByoungKil (SupervisorChoi,SeWan) Dept.of Control and Instrumentation Eng. Graduate School of Industry and Engineering Seoul National University of Science and Technology

 The demand of non-isolated high step-up DC-DC converters is gradually increasing in many applications such as dc back-up energy systems for UPS, photovoltaic and fuel cell systems and hybrid electric vehicles.This paper proposes non-isolated step-up DC-DC converters with an improved switching method.The proposed converter shows ZVS turn-on of the switches in CCM as well as reduced turn-off switching losses owing to the switching method that utilizes Lr-Cr resonance in the auxiliary circuit.Also,owing to the proposed switching method the switching losses associated with diode reverse recovery become negligible even in the small dutycycle.The capacitance in the auxiliary circuit is significantly reduced compared to PWM method.The duty cycle loss is further reduced resulting in increased step-up ratio. Experimental results from a 2kW prototype of two-phase interleaved version are also provided to validate the proposed concept.

 LINK FULL TEXT:https://www.mediafire.com/file/47c75j6rsx645de/A_Non-isolated_ZVZCS_Resonant_PWM_DC-DC_Converter.pdf/file

UNIFIED POWER QUALITY CONDITIONER: DESIGN, SIMULATION AND EXPERIMENTAL ANALYSIS Author Ahmet TEKE PhD THESIS DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING-UNIVERSITY OF ÇUKUROVA INSTITUTE OF NATURAL AND APPLIED SCIENCE

UNIFIED POWER QUALITY CONDITIONER: DESIGN, SIMULATION AND EXPERIMENTAL ANALYSIS AUTHOR Ahmet TEKE PhD THESIS

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING UNIVERSITY OF ÇUKUROVA INSTITUTE OF NATURAL AND APPLIED SCIENCE
 ABSTRACT
 Power quality (PQ) problem can be defined as the deviations of the voltage and/or current from the nominal sine wave. PQ problems generally concern with voltage sags/swells and harmonic currents. Custom Power (CP) devices that mitigate these power quality problems have gained more attention in the recent decades. Unified Power Quality Conditioner (UPQC) is one of the CP devices and it mitigates both load current and supply voltage problems, simultaneously. In this study, UPQC and a new topology of UPQC namely OPEN UPQC are designed, modeled and setup experimentally to mitigate voltage sag/swells and harmonic currents. UPQC consists of Dynamic Voltage Restorer (DVR) and Active Power Filter (APF). An improved voltage compensation controller and new sag/swell detection method based on Enhanced Phase Locked Loop (E-PLL) are presented for DVR. Traditional Instantaneous Reactive Power Theory (IRPT) is optimized for APF control algorithm to compensate harmonic load current under unbalanced and distorted supply voltages. Digital Signal Processor based 6 kVA, 230Vline-lineUPQC and OPEN UPQC prototypes have been developed for laboratory tests. UPQC and OPEN UPQC with proposed controller algorithms effectively compensates the sag/swell in supply voltage by keeping the load voltage amplitude at 0.9-1 per unit and eliminates the load current harmonics by keeping supply current at 5%

LINK
 https://www.mediafire.com/file/emmt5nhaj82tk1r/TEKE-CONDICIONADOR_POTENCIA.pdf/file

Ambientalismo: A grande farsa da humanidade e o grande atraso do Brasil PHD LUIZ CARLOS BALDICERO MOLION

Ambientalismo: A grande farsa da humanidade e o grande atraso do Brasil 

 LUIZ CARLOS BALDICERO MOLION, paulistano, 72 anos. Possui graduação em Física pela Universidade de São Paulo (1969), PhD em Meteorologia, University of Wisconsin, Madison (1975), pós-doutorado em Hidrologia de Florestas, Institute of Hydrology, Wallingford, UK (1982) e foi fellow do Wissenschaftskolleg zu Berlin, Alemanha (1989-1990). Foi por muitos anos pesquisador do Instituto Nacional de Pesquisas Espaciais, diretor da área de ciências espaciais e atmosféricas em 1985 e diretor associado em 1986, ano em que co-coordenou um projeto de pesquisa sobre a Amazônia em parceria com cientistas da NASA. Foi diretor da Fundação para Estudos Avançados no Trópico Úmido em Manaus, professor palestrante convidado da Western Michigan University de 15 a 30 de janeiro de 2001, e delegado do Brasil na 15ª reunião da Comissão de Climatologia da Organização Meteorológica Mundial em 2010.