Two-stage Active Gate Driver for SiC MOSFET by Abhay Negi
A thesis submitted to the Graduate Faculty of North Carolina State University in partial fulfillment of the requirements for the degree of Master of Science Electrical Engineering
Raleigh, North Carolina 2017
ABSTRACT
NEGI, ABHAY. Two-stage Active Gate driver for SiC MOSFET. (Under the direction of Dr. Subhashish Bhattacharya).
Wide-band gap devices have rejuvenated the research in field of power electronics due to their superior properties over Silicon (Si) such as low on-resistance, high breakdown voltage, low switching losses and high temperature operation. However, SiC MOSFETs and GaN devices pose varied challenges due to high dv/dt and di/dt switching which creates issues related EMI, common mode current, high voltage overshoot, cross-talk, etc. In phase-leg configuration, due to high turn-on dv/dt of SiC MOSFET, a positive spurious voltage is induced on the gate to source voltage (Vgs) of the complementary MOSFET. This reduces signal to noise margin on the Vgs of the complementary MOSFET making it susceptible to spurious turn-on in the phase-leg. This can be reduced by using higher turn-on gate resistance for lower dv/dt but it will lead to higher switching loss. This thesis explores the twostage turn-on active gating for SiC MOSFETs to control turn-on dv/dt and di/dt independently. A two-stage active gate driver is designed which uses lower gate resistance in first stage to increase rate of current rise and higher gate resistance in second stage for lower turn-on dv/dt. A low-inductance DC bus PCB is designed to minimize voltage overshoots and ringing associated with high loop inductance. Switching losses are measured with and without active gating by double-pulse testing of 1200V/ 300A ROHM SiC half-bridge module BSM300D12P2E001 for comparison.
LINK:https://research.ece.ncsu.edu/bhattacharya/wp-content/uploads/2019/07/etd29.pdf
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