In inverter driven UPS or motor applications, the IGBT can be destroyed when it is
turned-on into a faulted motor or an output short circuit or an input bus voltage shoot
through. Under these conditions current through the IGBT increases rapidly until it
saturates. After fault detection, depending on the point at which the fast turn-off pulse is
applied, very different levels of hole current can flow under the n+ source region, making
this an important factor in the successful containment of the fault current. We present
experimental observations showing that IGBT failure under short-circuit conditions is
dependent on where and how the turn-off pulse is applied. A two-step (two-level) turn-off
gate driver circuit is introduced which safely turns-off even a high transconductance
IGBT during short-circuit and abnormal over current faults. This turn-off process starts
during faulted condition only.
By Sampat Shekhawat and Bob Brockway, Fairchild Semiconductor.
It is very common that an IGBT used for motor drive, UPS and some
other industrial applications, be selected for 10 micro-second shortcircuit
withstand time (SCWT) if regular de-sat protection driver is
used. But this driver generates high turn-off stress to the IGBT during
inverter short circuit or the output becomes faulty. Under these abnormal
conditions when the IGBT is turned-off abruptly, failures can
occur if the IGBT is not selected properly. If the smart fault protection
is not used, high turn-off loss will be generated and even short circuit
current can ramp-up to a dangerous level destroying the IGBT. There
are several ways to turn-off the IGBT once fault condition is detected.
Some of these are as follows:
Gate is discharged through high gate resistance. This discharge path
is activated only during the above said abnormal conditions. This is
not the best solution.
Gate voltage is abruptly reduced to zero.
Adding some source inductance which is common for both gate discharge
path and load current.Gate de-bias occurs. But during normal
condition switching loss is increased.
Sense IGBT can also be used where fault current is sensed by pilot
cell but the current sense accuracy of these pilot cells is not good
which is further is affected by temperature.
Gate voltage pattern analyzer for short-circuit protection in IGBT
inverters [1]. These circuits are very sensitive to load changes and
type of loads.
Current sense resistor or Hall-effect devices are also used to detect
fault through IGBT. But again these methods either generate power
loss or are costly.
But de-sat protection is the most commonly used for short-circuit and
over current fault protection. De-sat detection truly provides the state
of electrical over stress of IGBT under current fault condition when
gate voltage is high. Reducing gate voltage in a controlled manner to
just above gate threshold voltage is preferred and described in this
article. This will reduce fault current and after some finite time gate
voltage is brought down to zero safely, turning-off the IGBT without
stress.
Gate Drive Circuit
The main function of any gate driver circuit is to convert a control signal
to a power signal that can efficiently controls the IGBT or MOSFET
turn-on and turn-off. If the IGBT or MOSFET requires short circuit
protection, the gate drive circuit must safely turn-off the switch
during a shorted or abnormal overload condition. A more detailed list
of the gate drive circuit requirements for an IGBT or MOSFET are as
follows:
A controlled turn-on and turn-off of the IGBT so as to optimize the
conduction and switching losses.
In some applications, electrical isolation between control circuit and
power circuit is very important.
In the case of a short circuit condition, the IGBT should be protected
and turned-off safely with minimum power dissipation and stress. The
gate drive circuit should be able to minimize short circuit current and
short-circuit withstand time without device failure. If both of these
parameters are minimized, the power dissipation under short circuit
will reduce and the system reliability will increase.
During a short circuit condition, the IGBT collector to emitter voltage
can rise fast. The voltage across the gate to emitter should not be
allowed to rise due to gate to collector displacement current flowing
into the gate to emitter capacitance, Cge. Current flowing into Cge
will cause Vge to rise and further increase the short circuit current.
One should make sure that this condition is avoided.
Preferably a totem pole output stage with separate turn-on and turnoff
resistance option. The gate discharging switch of the totem pole
should be as close as possible to IGBT and minimize the loop inductance
between this switch and IGBT gate & emitter terminals.
Minimize the propagation delay time between input and output pulses
of the gate driver.
De-Saturation
The de-saturation detection technique for identifying a short circuit
and fault condition in an IGBT is well known. Generally, a de-saturation
condition is said to exist if the voltage across the IGBT collector
to emitter terminals rises above 5-8 volts while the gate to emitter
voltage is high. This condition indicates that the current through the
IGBT has exceeded the normal operating level. The gate drive circuit
should be designed so that it reacts promptly to the short circuit and
safely turns-off the IGBT within SCWT rating of the IGBT. However, in
recent years, IGBTs have been designed with lower conduction and
switching losses but this generally reduces SCWT. IGBT technology
utilizes shallow junctions to decrease switching and conduction losses.
However these new technologies have increased the transconductance
(gm) of the IGBT. Since the magnitude of the IGBT short
circuit current is directly proportional to gm, during a short-circuit condition,
a higher collector current results. The large collector current
and high bus voltage place the IGBT in a state of high instantaneous
power dissipation that can only be sustained for a few microseconds.
The gate drive circuit must respond very quickly and efficiently to the
fault current to protect the IGBT. Due to the two-step turn-off, the
IGBT with even 4 microseconds short circuit withstand time can safely
be turned-off and protected. The IGBT, used in conjunction with the
two-step turn-off gate drive, safely turns off low impedance over-current
faults and shorted bus conditions where single-step gate drivers
fail. The Industry standard (10 μs) SCWT is no longer required when
the IGBT is used with this gate driver.
IGBT Behavior during short circuit and over current
The peak current during a short circuit is limited by the gm of the
IGBT. Moreover, the rate of rise of the current is limited by the turnon
characteristics of the IGBT in combination with common emitter
inductance. If IGBT collector current does not saturate and reach a
state of equilibrium and bus voltage has not raised high enough
attempting to turn off the IGBT during can lead to IGBT latch-up [2].
In case of fault conditions very different hole current flow under n+
source regions. These different hole current conditions and patterns
of hole current under n+ source generate different electrical stress. In
case if the gate voltage is brought down abruptly to zero before
device voltage reaches clamp, the IGBT can latch-up and fail. Flow
of electron through the channel is cutoff once the gate is turned off.
Holes continue to inject from emitter of p-n-p structure which is
known as IGBT collector. This process stops when electrons in IGBT
N-base are depleted. At this point IGBT current is almost all hole current.
The amount of holes is very high here and if IGBT does not
reach clamp voltage IGBT can latch-up and fail. However if enough
time is allowed to complete this process and plasma of electrons in
IGBT N-base is reduced or depleted so that base current reaches
zero. At this point the carriers from emitter of IGBT p-n-p transistor
are no longer injected and IGBT current is almost all hole current.
IGBT voltage rises at a rate so that edge of the depletion spread can
sweep out enough carriers to maintain inductive current. If enough
time is allowed to stabilize the bus voltage while the channel current
is flowing, the IGBT N-base is depleted and because of this current
flow is more uniformly distributed. The displacement current becomes
very small since dv/dt reduces and latch-up is avoided. If enough
time is not allowed for the IGBT to reach clamp voltage and gate voltage
is removed abruptly, IGBT voltage will rise with high dv/dt and
current in IGBT is non-uniformly distributed, high displacement current
generated by high dv/dt can latch-up IGBT. Non-uniform gate
ESR combined with Miller capacitance result in non-uniform turn-off
of IGBT active area. This results into high localized hole current density
flowing laterally in P-base of parasitic n-p-n bipolar resulting in
latch-up of parasitic thyristor. Because of these reasons one has to
wait untill IGBT reaches clamp voltage collector current saturates. So
it is safer to choose IGBT with 10 microseconds SCWT for motor
drive and UPS inverter applications if a regular gate driver is used.
Two step soft turn-off gate drive
It is clear that if the collector to emitter voltage rises to the DC Bus
slowly and high transconductance increases short circuit current, regular
driver does not protect an IGBT with a low short circuit withstand
time (<5us). However the longer SCWT comes at the cost of higher
switching and conduction losses. The rate of rise of the collector to
emitter voltage is dependent upon the operating conditions and can
take several microseconds to rise to bus voltage. However, the gate
drive must respond quickly to initiate turn off to protect a low SCWT
IGBT. The only solution is to lower the gate voltage to just above
threshold voltage of the IGBT. The IGBT reaches clamp voltage
faster and reduces IGBT current during fault.
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